The following figure shows a logic gate circuit with inputs A and B and output Y. If the voltage waveforms of A, B and Y are as given, then the logic gate is

The truth table for the waveform is given by \begin{array}{|c|c|c|c|} \cline { 2 - 4 } & A & B & Y \\ \cline { 2 - 4 }t_1-t_2 & 0 & 0 & 1 \\ \cline { 2 - 4 }t_2-t_3 & 0 & 1 & 1 \\ \cline { 2 - 4 }t_3-t_4 & 1 & 0 & 1 \\ \cline { 2 - 4 }t_4-t_5 & 1 & 1 & 0 \\ \cline { 2 - 4 }t_5-t_6 & 0 & 0 & 1 \\ \cline { 2 - 4 } & & & \end{array} The expression for the output is $Y=\overline{A \cdot B}$ The truth table of the given logic gate matches with NAND gate.